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  to learn more about on semiconductor, please visit our website at www.onsemi.com please note: as part of the fairchild semiconductor integration, some of the fairchild orderable part numbers will need to change in order to meet on semiconductors system requirements. since the on semiconductor product management systems do not have the ability to manage part nomenclature that utilizes an underscore (_), the underscore (_) in the fairchild part numbers will be changed to a dash (-). this document may contain device numbers with an underscore (_). please check the on semiconductor website to verify the updated device numbers. the most current and up-to-date ordering information can be found at www.onsemi.com . please email any questions regarding the system integration to fairchild_questions@onsemi.com . is now part of on semiconductor and the on semiconductor logo are trademarks of semico nductor components industries, llc dba on semiconductor or its subsid iaries in the united states and/or other countries. on semiconductor ow ns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellec tual property. a listing of on semiconductor?s product/patent cover age may be accessed at www.onsemi.com/site/pdf/patent-marking.pdf . on semiconductor reserves the right to make changes without further notice to any products herein. on semicon ductor makes no warranty, representation or guarantee regarding the s uitability of its products for any particular purpose, nor does on semico nductor assume any liability arising out of the application or use of any product or circuit, and speci?ca lly disclaims any and all liability, including without limitation spe cial, consequential or incidental damages. buyer is responsible for i ts products and applications using on semiconductor products, including compliance with all laws, regul ations and safety requirements or standards, regardless of any suppor t or applications information provided by on semiconductor. ?typica l? parameters which may be provided in on semiconductor data sheets and/or speci?cations can and do vary in diffe rent applications and actual performance may vary over time. all operat ing parameters, including ?typicals? must be validated for each custo mer application by customer?s technical experts. on semiconductor does not convey any license und er its patent rights nor the rights of others. on semiconductor products a re not designed, intended, or authorized for use as a critical compone nt in life support systems or any fda class 3 medical devices or medical devices with a same or similar classi?ca tion in a foreign jurisdiction or any devices intended for implantation i n the human body. should buyer purchase or use on semiconductor products fo r any such unintended or unauthorized application, buyer shall indemnify and hold on semico nductor and its of?cers, employees, subsidiaries, af?liates, and di stributors harmless against all claims, costs, damages, and expense s, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associa ted with such unintended or unauthorized use, even if such claim alleges th at on semiconductor was negligent regarding the design or manufacture o f the part. on semiconductor is an equal opportunity/af?rmative action employer. this literatu re is subject to all applicable copyright laws and is not for resale in any manne r.
? 2001 fairchild semiconductor corporation ds012424 www.fairchildsemi.com june 1998 revised february 2001 74lcx112 low voltage dual j-k negative edge-triggered flip-flop with 5v tolerant inputs 74lcx112 low voltage dual j-k negative edge-triggered flip-flop with 5v tolerant inputs general description the lcx112 is a dual j-k flip-flop. each flip-flop has inde- pendent j, k, preset, clear, and clock inputs with q, q outputs. these devices are edge sensitive and change state on the negative going transition of the clock pulse. clear and preset are independent of the clock and accom- plished by a low logic level on the corresponding input. lcx devices are designed for low voltage (3.3v or 2.5) operation with the added capability of interfacing to a 5v signal environment. the 74lcx112 is fabricated with advanced cmos technol- ogy to achieve high speed operation while maintaining cmos low power dissipation. features 5v tolerant inputs 2.3vC3.6v v cc specifications provided 7.5 ns t pd max (v cc = 3.3v), 10 a i cc max power down high impedance inputs and outputs 24 ma output drive (v cc = 3.0v) implements patented noise/emi reduction circuitry latch-up performance exceeds 500 ma esd performance: human body model > 2000v machine model > 2000v ordering code: devices also available in tape and reel. specify by appending suffix letter x to the ordering code. logic symbol ieee/iec connection diagram pin descriptions order number package number package description 74lcx112m m16a 16-lead small outline integrated circuit (soic), jedec ms-012, 0.150 narrow 74lcx112sj m16d 16-lead small outline package (sop), eiaj type ii, 5.3mm wide 74LCX112MTC mtc16 16-lead thin shrink small outline package (tssop), jedec mo-153, 4.4mm wide pin names description j 1 , j 2 , k 1 , k 2 data inputs cp 1 , cp 2 clock pulse inputs (active falling edge) c d1 , c d2 direct clear inputs (active low) s d1 , s d2 direct set inputs (active low) q 1 , q 2 , q 1 , q 2 outputs
www.fairchildsemi.com 2 74lcx112 truth table (each half) h(h) = high voltage level l(l) = low voltage level x = immaterial  = high-to-low clock transition q o (q o ) = before high-to-low transition of clock lower case letters indicate the state of the referenced input or output one setup time prior to the high-to-low clock transitio n. logic diagram inputs outputs s d c d cp jkqq lhxxxhl hlxxxlh l lxxxhh hh  hhq o q o hh  lhlh hh  hlhl hh  llq o q o hhhxxq o q o
3 www.fairchildsemi.com 74lcx112 absolute maximum ratings (note 1) recommended operating conditions (note 3) note 1: the absolute maximum ratings are those values beyond which the safety of the dev ice cannot be guaranteed. the device should not be operated at these limits. the parametric values defined in the electrical character istics tables are not guaranteed at the absolute maxi mum ratings. the recom- mended operating conditions table will define the conditions for actual device operation. note 2: i o absolute maximum rating must be observed. note 3: unused inputs must be held high or low. they may not float. dc electrical characteristics symbol parameter value conditions units v cc supply voltage ? 0.5 to + 7.0 v v i dc input voltage ? 0.5 to + 7.0 v v o dc output voltage ? 0.5 to v cc + 0.5 output in high or low state (note 2) v i ik dc input diode current ? 50 v i < gnd ma i ok dc output diode current ? 50 v o < gnd ma + 50 v o > v cc i o dc output source/sink current 50 ma i cc dc supple current per supply pin 100 ma i gnd dc ground current per ground pin 100 ma t stg storage temperature ? 65 to 150 c symbol parameter min max units v cc supply voltage operating 2.0 3.6 v data retention 1.5 3.6 v i input voltage 05 . 5v v o output voltage high or low state 0 v cc v i oh /i ol output current v cc = 3.0v ? 3.6v 24 ma v cc = 2.7v ? 3.0v 12 v cc = 2.3v ? 2.7v 8 t a free-air operating temperature ? 40 85 c ? t/ ? v input edge rate, v in = 0.8v ? 2.0v, v cc = 3.0v 0 10 ns/v symbol parameter conditions v cc t a = 40 c to + 85 c units (v) min max v ih high level input voltage 2.3 ? 2.7 1.7 v 2.7 ? 3.6 2.0 v il low level input voltage 2.3 ? 2.7 0.7 v 2.7 ? 3.6 0.8 v oh high level output voltage i oh = ? 100 a2 . 3 ? 3.6 v cc - 0.2 0.7 v i oh = -8 ma 2.3 1.8 i oh = ? 12 ma 2.7 2.2 i oh = ? 18 ma 3.0 2.4 i oh = ? 24 ma 3.0 2.2 v ol low level output voltage i ol = 100 a2 . 3 ? 3.6 0.6 i ol = 8ma 2.3 0.2 i ol = 12 ma 2.7 0.4 v i ol = 16 ma 3.0 0.4 i ol = 24 ma 3.0 0.55 i i input leakage current 0 i i 5.5v 2.3 ? 3.6 5.0 a i off power-off leakage current v i or v o = 5.5v 0 10 a i cc quiescent supply current v i = v cc or gnd 2.3 ? 3.6 10 a 3.6v v i 5.5v 2.3 ? 3.6 10 a ? i cc increase in i cc per input v ih = v cc ? 0.6v 2.3 ? 3.6 500 a
www.fairchildsemi.com 4 74lcx112 ac electrical characteristics note 4: skew is defined as the absolute value of the difference between the actual propagati on delay for any two separate outputs of th e same device. the specification applies to any outputs switching in the same direction, either high-to -low (t oshl ), or low-to-high (t oslh ). dynamic switching characteristics capacitance symbol parameters t a = 40 c to 85 c, r l = 500 units v cc = 3.3v 0.3v v cc = 2.7v v cc = 2.5v 0.2v c l = 50 pf c l = 50 pf c l = 30 pf min max min max min max f max maximum clock frequency 150 150 150 mhz t phl propagation delay 1.5 7.5 1.5 8.0 1.5 9.0 ns t plh cp n to q n or q n 1 . 57 . 51 . 58 . 01 . 59 . 0 t phl propagation delay 1.5 7.0 1.5 8.0 1.5 8.4 ns t plh c dn or s dn to q n or q n 1 . 57 . 01 . 78 . 01 . 58 . 4 t s setup time 2.5 2.5 4.0 ns t h hold time 1.5 1.5 2.0 ns t w pulse width cp 3.3 3.3 4.0 ns t w pulse width (c d , s d ) 3.3 3.3 4.0 ns t rec recovery time 2.0 2.5 4.5 ns t oshl output to output skew 1.0 ns t oslh (note 4) 1.0 symbol parameter conditions v cc t a = 25 c units (v) typical v olp quiet output dynamic peak v ol c l = 50 pf, v ih = 3.3v, v il = 0v 3.3 0.8 v c l = 30 pf, v ih = 2.5v, v il = 0v 2.5 0.6 v olv quiet output dynamic valley v ol c l = 50 pf, v ih = 3.3v, v il = 0v 3.3 ? 0.8 v c l = 30 pf, v ih = 2.5v, v il = 0v 2.5 ? 0.6 symbol parameter conditions typical units c in input capacitance v cc = open, v i = 0v or v cc 7p f c out output capacitance v cc = 3.3v, v i = 0v or v cc 8p f c pd power dissipation capacitance v cc = 3.3v, v i = 0v or v cc , f = 10 mhz 25 pf
5 www.fairchildsemi.com 74lcx112 ac loading and waveforms generic for lcx family figure 1. ac test circuit (c l includes probe and jig capacitance) waveform for inverting and non-inverting functions propagation delay, pulse width and t rec waveforms 3-state output high enable and disable times for logic 3-state output low enable and disable times for logic setup time, hold time and recovery time for logic t rise and t fall figure 2. waveforms (input pulse characteristics; f=1mhz, t r =t f =3ns) test switch t plh , t phl open t pzl , t plz 6v at v cc = 3.3 0.3v v cc x 2 at v cc = 2.5 0.2v t pzh ,t phz gnd symbol v cc 3.3v 0.3v 2.7v 2.5v 0.2v v mi 1.5v 1.5v v cc /2 v mo 1.5v 1.5v v cc /2 v x v ol + 0.3v v ol + 0.3v v ol + 0.15v v y v oh ? 0.3v v oh ? 0.3v v oh ? 0.15v
www.fairchildsemi.com 6 74lcx112 schematic diagram generic for lcx family
7 www.fairchildsemi.com 74lcx112 physical dimensions inches (millimeters) unless otherwise noted 16-lead small outline integrated circuit (soic), jedec ms-012, 0.150 narrow package number m16a
www.fairchildsemi.com 8 74lcx112 physical dimensions inches (millimeters) unless otherwise noted (continued) 16-lead small outline package (sop), eiaj type ii, 5.3mm wide package number m16d
9 www.fairchildsemi.com 74lcx112 low voltage dual j-k negative edge-triggered flip-flop with 5v tolerant inputs physical dimensions inches (millimeters) unless otherwise noted (continued) 16-lead thin shrink small outline package (tssop), jedec mo-153, 4.4mm wide package number mtc16 fairchild does not assume any responsibility for use of any circuitry described, no circ uit patent licenses are implied and fairchild reserves the right at any time without notice to change said circuitry and specifications. life support policy fairchild s products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user. 2. a critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com
www. onsemi.com 1 on semiconductor and are trademarks of semiconductor components industries, llc dba on semiconductor or its subsidiaries i n the united states and/or other countries. on semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property . a listing of on semiconductors product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent ? marking.pdf . on semiconductor reserves the right to make changes without further notice to any products herein. on semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does on semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. buyer is responsible for its products and applications using on semiconductor products, including compliance with all laws, reg ulations and safety requirements or standards, regardless of any support or applications information provided by on semiconductor. typical parameters which may be provided in on semiconductor data sheets and/or specifications can and do vary in dif ferent applications and actual performance may vary over time. all operating parameters, including typic als must be validated for each customer application by customers technical experts. on semiconductor does not convey any license under its patent rights nor the right s of others. on semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any fda class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. should buyer purchase or use on semicondu ctor products for any such unintended or unauthorized application, buyer shall indemnify and hold on semiconductor and its officers, employees, subsidiaries, affiliates, and distrib utors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that on semiconductor was negligent regarding the design or manufacture of the part. on semiconductor is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 www.onsemi.com literature fulfillment : literature distribution center for on semiconductor 19521 e. 32nd pkwy, aurora, colorado 80011 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your localsales representative ? semiconductor components industries, llc


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